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aat3218 150ma micropower? high performance ldo 3218.2006.04.1.8 1 general description the aat3218 micropower low dropout linear regula- tor is ideally suited for portable applications where very fast transient response, extended battery life, and small size are critical. the aat3218 has been specifically designed for high-speed turn-on and turn- off performance, fast transient response, and good power supply ripple rejection (psrr), and is reason- ably low noise, making it ideal for powering sensitive circuits with fast switching requirements. other features include low quiescent current, typical- ly 70a, and low dropout voltage, typically less than 200mv at the maximum output current level of 150ma. the device is output short-circuit protected and has a thermal shutdown circuit for additional pro- tection under extreme operating conditions. the aat3218 also features a low-power shutdown mode for extended battery life. a reference bypass pin has been provided to improve psrr perform- ance and output noise, by connecting a small external capacitor from device reference output to ground. the aat3218 is available in a pb-free, space-sav- ing 5-pin sot23 or 8-pin sc70jw package in 16 factory-programmed voltages: 1.2v, 1.4v, 1.5v, 1.8v, 1.9v, 2.0v, 2.3v, 2.5v, 2.6v, 2.7v, 2.8v, 2.85v, 2.9v, 3.0v, 3.3v, or 3.5v. features ? low dropout: 200mv at 150ma ? guaranteed 150ma output ? high accuracy: 1.5% ? 70a quiescent current ? fast line and load transient response ? high-speed device turn-on and shutdown ? high power supply ripple rejection ? low self noise ? short-circuit and over-temperature protection ? uses low equivalent series resistance (esr) ceramic capacitors ? output noise reduction bypass capacitor ? shutdown mode for longer battery life ? low temperature coefficient ? 16 factory-programmed output voltages ? sot23 5-pin or sc70jw 8-pin package applications ? bluetooth? headsets ? cellular phones ? digital cameras ? notebook computers ? personal portable electronics ? portable communication devices typical application powerlinear ? aat3218 en in out byp gnd on/off 1 f 10nf 2.2 f v in gnd gnd v out
aat3218 150ma micropower? high performance ldo 2 3218.2006.04.1.8 pin descriptions pin configuration sot23-5 sc70jw-8 (top view) (top view) pin # symbol function sot23-5 sc70jw-8 1 5, 6 in input voltage pin; should be decoupled with 1f or greater capacitor. 2 8 gnd ground connection pin. 3 7 en enable pin; this pin should not be left floating. when pulled low, the pmos pass transistor turns off and all internal circuitry enters low-power mode, consuming less than 1a. 4 1 byp bypass capacitor connection; to improve ac ripple rejection, connect a 10nf capacitor to gnd. this will also provide a soft- start function. 5 2, 3, 4 out output pin; should be decoupled with 2.2f ceramic capacitor. out out out gnd en in in byp 1 2 3 45 6 7 8 gnd out byp en in 1 2 3 4 5
absolute maximum ratings 1 t a = 25c, unless otherwise noted. thermal information 2 recommended operating conditions symbol description rating units v in input voltage 3 (v out +v do ) to 5.5 v t ambient temperature range -40 to +85 c symbol description rating units ja maximum thermal resistance (sot23-5, sc70jw-8) 190 c/w p d maximum power dissipation (sot23-5, sc70jw-8) 526 mw symbol description value units v in input voltage 6 v v enin(max) maximum en to input voltage 0.3 v i out dc output current p d /(v in -v o )ma t j operating junction temperature range -40 to 150 c aat3218 150ma micropower? high performance ldo 3218.2006.04.1.8 3 1. stresses above those listed in absolute maximum ratings may cause permanent damage to the device. functional operation at c ondi- tions other than the operating conditions specified is not implied. only one absolute maximum rating should be applied at any one time. 2. mounted on a demo board. 3. to calculate minimum input voltage, use the following equation: v in(min) = v out(max) + v do(max) as long as v in 2.5v.
electrical characteristics v in = v out(nom) + 1v for v out options greater than 1.5v. v in = 2.5 for v out 1.5v. i out = 1ma, c out = 2.2f, c in = 1f, t a = -40c to +85c, unless otherwise noted. typical values are t a = 25c. symbol description conditions min typ max units v out output voltage tolerance i out = 1ma t a = 25c -1.5 1.5 % to150ma t a = -40c to 85c -2.5 2.5 i out output current v out > 1.2v 150 ma v do dropout voltage 1, 2 i out = 150ma 200 300 mv i sc short-circuit current v out < 0.4v 600 ma i q ground current v in = 5v, no load, en = v in 70 125 a i sd shutdown current v in = 5v, en = 0v 1 a v out / line regulation v in = v out + 1 to 5.0v 0.09 %/v v out * v in v out (line) dynamic line regulation v in = v out + 1v to v out + 2v, 2.5 mv i out = 150ma, t r /t f = 2s v out (load) dynamic load regulation i out = 1ma to 150ma, t r < 5s 30 mv t endly enable delay time byp = open 15 s v en(l) enable threshold low 0.6 v v en(h) enable threshold high 1.5 v i en leakage current on enable pin v en = 5v 1 a 1 khz 67 psrr power supply rejection ratio i out = 10ma, 10khz 47 db c byp = 10nf 1mhz 45 t sd over-temperature shutdown 145 c threshold t hys over-temperature shutdown 12 c hysteresis e n output noise noise power bw = 300hz - 50khz 50 vrms tc output voltage temperature 22 ppm/c coefficient aat3218 150ma micropower? high performance ldo 4 3218.2006.04.1.8 1. v do is defined as v in - v out when v out is 98% of nominal. 2. for v out < 2.3v, v do = 2.5v - v out .
aat3218 150ma micropower? high performance ldo 3218.2006.04.1.8 5 typical characteristics unless otherwise noted, v in = 5v, t a = 25c. output voltage vs. temperature 1.196 1.197 1.198 1.199 1.200 1.201 1.202 1.203 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 temperature ( quiescent current vs. temperature 0 10 20 30 40 50 60 70 80 90 100 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 temperature ( ground current vs. input voltage 0.00 10.00 20.00 30.00 40.00 50.00 60.00 70.00 80.00 90.00 2 2.5 3 3.5 4 4.5 5 input voltage (v) ground current ( i out = 0ma i out = 10ma i out = 50ma i out = 150ma dropout voltage vs. output current 0 50 100 150 200 250 300 0 25 50 75 100 125 150 output current (ma) dropout voltage (mv) 85 c 25 c -40 c dropout characteristics 2.00 2.20 2.40 2.60 2.80 3.00 3.20 2.70 2.80 2.90 3.00 3.10 3.20 input voltage (v) output voltage (v) i out = 150ma i out = 100ma i out = 50ma i out = 10ma i out = 0ma dropout voltage vs. temperature 0 20 40 60 80 100 120 140 160 180 200 220 240 260 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 temperature ( i l = 150ma i l = 100ma i l = 50ma
typical characteristics unless otherwise noted, v in = 5v, t a = 25c. aat3218 150ma micropower? high performance ldo 6 3218.2006.04.1.8 load transient response 2.60 2.65 2.70 2.75 2.80 2.85 2.90 time (100s/div) output voltage (v) -100 0 100 200 300 400 500 output current (ma) v out i out line transient response 2.98 2.99 3.00 3.01 3.02 3.03 3.04 time (100s/div) input voltage (v) 0 1 2 3 4 5 6 output voltage (v) v out v in over-current protection -200 0 200 400 600 800 1000 1200 time (20ms/div) output current (ma) turn-on time from enable (v in present) (c byp = 10nf) time (5s/div) v en (5v/div) v out (1v/div) time (50s/div) v en (5v/div) v out (1v/div) turn-off response time (c byp = 10nf) initial power-up response time (c byp = 10nf) time (400s/div) v en (5v/div) v out (1v/div)
aat3218 150ma micropower? high performance ldo 3218.2006.04.1.8 7 typical characteristics unless otherwise noted, v in = 5v, t a = 25c. v ih and v il vs. v in 1.050 1.075 1.100 1.125 1.150 1.175 1.200 1.225 1.250 2.5 3.0 3.5 4.0 4.5 5.0 5.5 input voltage (v) v ih v il aat3218 self noise (c out = 10 f, ceramic) 0.001 0.01 0.1 1 10 0.01 0.1 1 10 100 1000 10000 frequency (khz) noise amplitude (v/rthz) band power: 300hz to 50khz = 44.6vrms/rthz 100hz to 100khz = 56.3vrms/rthz
aat3218 150ma micropower? high performance ldo 8 3218.2006.04.1.8 functional description the aat3218 is intended for ldo regulator appli- cations where output current load requirements range from no load to 150ma. the advanced cir- cuit design of the aat3218 has been specifically optimized for very fast start-up and shutdown tim- ing. this proprietary cmos ldo has also been tailored for superior transient response characteris- tics. these traits are particularly important for applications that require fast power supply timing, such as gsm cellular telephone handsets. the high-speed turn-on capability of the aat3218 is enabled through the implementation of a fast- start control circuit, which accelerates the power- up behavior of fundamental control and feedback circuits within the ldo regulator. fast turn-off response time is achieved by an active output pull-down circuit, which is enabled when the ldo regulator is placed in shutdown mode. this active fast shutdown circuit has no adverse effect on normal device operation. the aat3218 has very fast transient response characteristics, which is an important feature for applications where fast line and load transient response are required. this rapid transient response behavior is accomplished through the implementation of an active error amplifier feed- back control. this proprietary circuit design is unique to this micropower ldo regulator. the ldo regulator output has been specifically optimized to function with low-cost, low-esr ceramic capacitors. however, the design will allow for operation over a wide range of capacitor types. a bypass pin has been provided to allow the addi- tion of an optional voltage reference bypass capacitor to reduce output self noise and increase power supply ripple rejection. device self noise and psrr will be improved by the addition of a small ceramic capacitor to this pin. however, increased c bypass values may slow down the ldo regulator turn-on time. this ldo regulator has complete short-circuit and thermal protection. the integral combination of these two internal protection circuits gives the aat3218 a comprehensive safety system to guard against extreme adverse operating conditions. device power dissipation is limited to the package type and thermal dissipation properties. refer to the thermal considerations section of this datasheet for details on device operation at maxi- mum output current loads. functional block diagram error amplifier over-current protection over- temperature protection voltage reference + - in en byp ou t gnd active feedback control fast- start control
applications information to assure the maximum possible performance is obtained from the aat3218, please refer to the fol- lowing application recommendations. input capacitor typically, a 1f or larger capacitor is recommend- ed for c in in most applications. a c in capacitor is not required for basic ldo regulator operation. however, if the aat3218 is physically located more than three centimeters from an input power source, a c in capacitor will be needed for stable operation. c in should be located as close to the device v in pin as practically possible. c in values greater than 1f will offer superior input line transient response and will assist in maximizing the highest possible power supply ripple rejection. ceramic, tantalum, or aluminum electrolytic capac- itors may be selected for c in . there is no specific capacitor esr requirement for c in . however, for 150ma ldo regulator output operation, ceramic capacitors are recommended for c in due to their inherent capability over tantalum capacitors to with- stand input current surges from low impedance sources, such as batteries in portable devices. output capacitor for proper load voltage regulation and operational stability, a capacitor is required between pins v out and gnd. the c out capacitor connection to the ldo regulator ground pin should be made as direct as practically possible for maximum device performance. the aat3218 has been specifically designed to func- tion with very low esr ceramic capacitors. for best performance, ceramic capacitors are recommended. typical output capacitor values for maximum output current conditions range from 1f to 10f. applications utilizing the exceptionally low output noise and optimum power supply ripple rejection characteristics of the aat3218 should use 2.2f or greater for c out . if desired, c out may be increased without limit. in low output current applications where output load is less than 10ma, the minimum value for c out can be as low as 0.47f. bypass capacitor and low noise applications a bypass capacitor pin is provided to enhance the low noise characteristics of the aat3218 ldo regu- lator. the bypass capacitor is not necessary for operation of the aat3218. however, for best device performance, a small ceramic capacitor should be placed between the bypass pin (byp) and the device ground pin (gnd). the value of c byp may range from 470pf to 10nf. for lowest noise and best pos- sible power supply ripple rejection performance, a 10nf capacitor should be used. to practically realize the highest power supply ripple rejection and lowest output noise performance, it is critical that the capac- itor connection between the byp pin and gnd pin be direct and pcb traces should be as short as possi- ble. refer to the pcb layout recommendations section of this datasheet for examples. there is a relationship between the bypass capac- itor value and the ldo regulator turn-on time and turn-off time. in applications where fast device turn-on and turn-off time are desired, the value of c byp should be reduced. in applications where low noise performance and/ or ripple rejection are less of a concern, the bypass capacitor may be omitted. the fastest device turn- on time will be realized when no bypass capacitor is used. dc leakage on this pin can affect the ldo regula- tor output noise and voltage regulation perform- ance. for this reason, the use of a low leakage, high quality ceramic (npo or c0g type) or film capacitor is highly recommended. capacitor characteristics ceramic composition capacitors are highly recom- mended over all other types of capacitors for use with the aat3218. ceramic capacitors offer many advantages over their tantalum and aluminum elec- trolytic counterparts. a ceramic capacitor typically aat3218 150ma micropower? high performance ldo 3218.2006.04.1.8 9
aat3218 150ma micropower? high performance ldo 10 3218.2006.04.1.8 has very low esr, is lower cost, has a smaller pcb footprint, and is non-polarized. line and load tran- sient response of the ldo regulator is improved by using low-esr ceramic capacitors. since ceramic capacitors are non-polarized, they are not prone to incorrect connection damage. equivalent series resistance: esr is a very important characteristic to consider when selecting a capacitor. esr is the internal series resistance asso- ciated with a capacitor that includes lead resistance, internal connections, size and area, material compo- sition, and ambient temperature. typically, capacitor esr is measured in milliohms for ceramic capacitors and can range to more than several ohms for tanta- lum or aluminum electrolytic capacitors. ceramic capacitor materials: ceramic capaci- tors less than 0.1f are typically made from npo or c0g materials. npo and c0g materials gener- ally have tight tolerance and are very stable over temperature. larger capacitor values are usually composed of x7r, x5r, z5u, or y5v dielectric materials. large ceramic capacitors (i.e., greater than 2.2f) are often available in low-cost y5v and z5u dielectrics. these two material types are not recommended for use with ldo regulators since the capacitor tolerance can vary more than 50% over the operating temperature range of the device. a 2.2f y5v capacitor could be reduced to 1f over temperature; this could cause problems for circuit operation. x7r and x5r dielectrics are much more desirable. the temperature tolerance of x7r dielectric is better than 15%. capacitor area is another contributor to esr. capacitors that are physically large in size will have a lower esr when compared to a smaller sized capacitor of an equivalent material and capacitance value. these larger devices can improve circuit tran- sient response when compared to an equal value capacitor in a smaller package size. consult capacitor vendor datasheets carefully when selecting capacitors for ldo regulators. enable function the aat3218 features an ldo regulator enable/ disable function. this pin (en) is active high and is compatible with cmos logic. to assure the ldo regulator will switch on, the en turn-on control level must be greater than 1.5v. the ldo regulator will go into the disable shutdown mode when the volt- age on the en pin falls below 0.6v. if the enable function is not needed in a specific application, it may be tied to v in to keep the ldo regulator in a continuously on state. when the ldo regulator is in shutdown mode, an internal 1.5k resistor is connected between v out and gnd. this is intended to discharge c out when the ldo regulator is disabled. the internal 1.5k has no adverse effect on device turn-on time. short-circuit protection the aat3218 contains an internal short-circuit pro- tection circuit that will trigger when the output load current exceeds the internal threshold limit. under short-circuit conditions, the output of the ldo reg- ulator will be current limited until the short-circuit condition is removed from the output or ldo regu- lator package power dissipation exceeds the device thermal limit. thermal protection the aat3218 has an internal thermal protection cir- cuit which will turn on when the device die temper- ature exceeds 150c. the internal thermal protec- tion circuit will actively turn off the ldo regulator output pass device to prevent the possibility of over- temperature damage. the ldo regulator output will remain in a shutdown state until the internal die temperature falls back below the 150c trip point. the combination and interaction between the short- circuit and thermal protection systems allows the ldo regulator to withstand indefinite short-circuit conditions without sustaining permanent damage.
no-load stability the aat3218 is designed to maintain output volt- age regulation and stability under operational no- load conditions. this is an important characteristic for applications where the output current may drop to zero. reverse output-to-input voltage conditions and protection under normal operating conditions, a parasitic diode exists between the output and input of the ldo regulator. the input voltage should always remain greater than the output load voltage, main- taining a reverse bias on the internal parasitic diode. conditions where v out might exceed v in should be avoided since this would forward bias the internal parasitic diode and allow excessive current flow into the v out pin, possibly damaging the ldo regulator. in applications where there is a possibility of v out exceeding v in for brief amounts of time during nor- mal operation, the use of a larger value c in capaci- tor is highly recommended. a larger value of c in with respect to c out will effect a slower c in decay rate during shutdown, thus preventing v out from exceeding v in . in applications where there is a greater danger of v out exceeding v in for extended periods of time, it is recommended to place a schottky diode across v in to v out (connecting the cathode to v in and anode to v out ). the schottky diode forward voltage should be less than 0.45v. thermal considerations and high output current applications the aat3218 is designed to deliver a continuous output load current of 150ma under normal operat- ing conditions. the limiting characteristic for the maximum output load current safe operating area is essentially package power dissipation and the internal preset thermal limit of the device. in order to obtain high operating currents, careful device layout and circuit operating conditions must be taken into account. the following discussions will assume the ldo reg- ulator is mounted on a printed circuit board utilizing the minimum recommended footprint, as stated in the layout considerations section of this datasheet. at any given ambient temperature (t a ), the maxi- mum package power dissipation can be deter- mined by the following equation: constants for the aat3218 are t j(max) , the maxi- mum junction temperature for the device which is 125c and ja = 190c/w, the package thermal resistance. typically, maximum conditions are cal- culated at the maximum operating temperature where t a = 85c, under normal ambient conditions t a = 25c. given t a = 85c, the maximum pack- age power dissipation is 211mw. at t a = 25c, the maximum package power dissipation is 526mw. the maximum continuous output current for the aat3218 is a function of the package power dissi- pation and the input-to-output voltage drop across the ldo regulator. refer to the following simple equation: for example, if v in = 5v, v out = 3v, and t a = 25c, i out(max) < 264ma. if the output load current were to exceed 264ma or if the ambient temperature were to increase, the internal die temperature would increase. if the condition remained con- stant, the ldo regulator thermal protection circuit would activate. to determine the maximum input voltage for a given load current, refer to the following equation. this calculation accounts for the total power dissi- pation of the ldo regulator, including that caused by ground current. p d(max) = (v in - v out )i out + (v in x i gnd ) aat3218 150ma micropower? high performance ldo 3218.2006.04.1.8 11 p d(max) i out(max) < (v in - v out ) [t j(max) - t a ] p d(max) = ja
aat3218 150ma micropower? high performance ldo 12 3218.2006.04.1.8 this formula can be solved for v in to determine the maximum input voltage. the following is an example for an aat3218 set for a 2.5v output: from the discussion above, p d(max) was deter- mined to equal 526mw at t a = 25c. thus, the aat3218 can sustain a constant 2.5v output at a 150ma load current as long as v in is 6.0v at an ambient temperature of 25c. 6.0v is the absolute maximum voltage where an aat3218 would never be operated, thus at 25c, the device would not have any thermal concerns or opera- tional v in(max) limits. this situation can be different at 85c. the follow- ing is an example for an aat3218 set for a 2.5v output at 85c: from the discussion above, p d(max) was deter- mined to equal 211mw at t a = 85c. higher input-to-output voltage differentials can be obtained with the aat3218, while maintaining device functions within the thermal safe operating area. to accomplish this, the device thermal resistance must be reduced by increasing the heat sink area or by operating the ldo regulator in a duty-cycled mode. for example, an application requires v in = 4.2v while v out = 2.5v at a 150ma load and t a = 85c. v in is greater than 3.90v, which is the maximum safe continuous input level for v out = 2.5v at 150ma for t a = 85c. to maintain this high input voltage and output current level, the ldo regulator must be operated in a duty-cycled mode. refer to the following calculation for duty-cycle operation (p d(max) is assumed to be 211mw): for a 150ma output current and a 2.7v drop across the aat3218 at an ambient temperature of 85c, the maximum on-time duty cycle for the device would be 85.54%. the following family of curves show the safe oper- ating area for duty-cycled operation from ambient room temperature to the maximum operating level. %dc = 100 i gnd = 150 a i out = 150ma v in = 4.2v v out = 2.5v %dc = 85.54% p d(max) (v in - v out )i out + (v in i gnd ) %dc = 100 211mw (4.2v - 2.5v)150ma + (4.2v 150a) v in(max) = v out = 2.5v i out = 150ma i gnd = 150a v in(max) = 3.90v 211mw + (2.5v 150ma) 150ma + 150a v in(max) = v out = 2.5v i out = 150ma i gnd = 150a v in(max) = 6.00v 526mw + (2.5v 150ma) 150ma + 150a p d(max) + (v out i out ) v in(max) = i out i gnd
aat3218 150ma micropower? high performance ldo 3218.2006.04.1.8 13 high peak output current applications some applications require the ldo regulator to operate at continuous nominal level with short dura- tion, high-current peaks. the duty cycles for both output current levels must be taken into account. to do so, first calculate the power dissipation at the nominal continuous level, then factor in the addi- tional power dissipation due to the short duration, high-current peaks. for example, a 2.5v system using an aat3218igv- 2.5-t1 operates at a continuous 100ma load cur- rent level and has short 150ma current peaks. the current peak occurs for 378s out of a 4.61ms peri- od. it will be assumed the input voltage is 4.2v. first, the current duty cycle in percent must be calculated: % peak duty cycle: x/100 = 378s/4.61ms % peak duty cycle = 8.2% the ldo regulator will be under the 100ma load for 91.8% of the 4.61ms period and have 150ma peaks occurring for 8.2% of the time. next, the continuous nominal power dissipation for the 100ma load should be determined then multiplied by the duty cycle to conclude the actual power dis- sipation over time. p d(max) = (v in - v out )i out + (v in x i gnd ) p d(100ma) = (4.2v - 2.5v)100ma + (4.2v x 150a) p d(100ma) = 170.6mw p d(91.8%d/c) = %dc x p d(100ma) p d(91.8%d/c) = 0.918 x 170.6mw p d(91.8%d/c) = 156.6mw the power dissipation for a 100ma load occurring for 91.8% of the duty cycle will be 156.6mw. now the power dissipation for the remaining 8.2% of the duty cycle at the 150ma load can be calculated: p d(max) = (v in - v out )i out + (v in x i gnd ) p d(150ma) = (4.2v - 2.5v)150ma + (4.2v x 150ma) p d(150ma) = 255.6mw p d(8.2%d/c) = %dc x p d(150ma) p d(8.2%d/c) = 0.082 x 255.6mw p d(8.2%d/c) = 21mw device duty cycle vs. v drop (v out = 2.5v @ 85 0 0.5 1 1.5 2 2.5 3 3.5 0 10203040 5060 7080 90100 duty cycle (%) voltage drop (v) 200ma 150ma 100ma device duty cycle vs. v drop (v out = 2.5v @ 50 0 0.5 1 1.5 2 2.5 3 3.5 0 10203040 5060 7080 90100 duty cycle (%) voltage drop (v) 200ma 150ma device duty cycle vs. v drop (v out = 2.5v @ 25 0 0.5 1 1.5 2 2.5 3 3.5 0 10203040 5060 7080 90100 duty cycle (%) voltage drop (v) 200ma
aat3218 150ma micropower? high performance ldo 14 3218.2006.04.1.8 figure 1: common ldo regulator layout with c byp ripple feedback loop. figure 2 shows the preferred method for the bypass and output capacitor connections. for low output noise and highest possible power supply ripple rejection performance, it is critical to connect the bypass and output capacitor directly to the ldo reg- ulator ground pin. this method will eliminate any load noise or ripple current feedback through the ldo regulator. the power dissipation for a 150ma load occurring for 8.2% of the duty cycle will be 21mw. finally, the two power dissipation levels can summed to determine the total true power dissipation under the varied load: p d(total) = p d(100ma) + p d(150ma) p d(total) = 156.6mw + 21mw p d(total) = 177.6mw the maximum power dissipation for the aat3218 operating at an ambient temperature of 85c is 211mw. the device in this example will have a total power dissipation of 177.6mw. this is well within the thermal limits for safe operation of the device. printed circuit board layout recommendations in order to obtain the maximum performance from the aat3218 ldo regulator, careful consideration should be given to the printed circuit board (pcb) layout. if grounding connections are not properly made, power supply ripple rejection, low output self noise, and transient response can be compromised. figure 1 shows a common ldo regulator layout scheme. the ldo regulator, external capacitors (c in , c out , and c byp ), and the load circuit are all connected to a common ground plane. this type of layout will work in simple applications where good power supply ripple rejection and low self noise are not a design concern. for high-performance appli- cations, this method is not recommended. the problem with the layout in figure 1 is the bypass capacitor and output capacitor share the same ground path to the ldo regulator ground pin, along with the high-current return path from the load back to the power supply. the bypass capac- itor node is connected directly to the ldo regulator internal reference, making this node very sensitive to noise or ripple. the internal reference output is fed into the error amplifier, thus any noise or ripple from the bypass capacitor will be subsequently amplified by the gain of the error amplifier. this effect can increase noise seen on the ldo regula- tor output, as well as reduce the maximum possi- ble power supply ripple rejection. there is pcb trace impedance between the bypass capacitor connection to ground and the ldo regulator ground connection. when the high load current returns through this path, a small ripple voltage is created, feeding into the c byp loop. ldo regulator c byp c out r trace r trace r trace r trace c in r loa d vin en gnd vout byp i load i ripple i in v in gnd dc input i gnd c byp gnd loop i load return + noise and ripple i byp + noise
aat3218 150ma micropower? high performance ldo 3218.2006.04.1.8 15 figure 2: recommended ldo regulator layout. evaluation board layout the aat3218 evaluation layout follows the recom- mend printed circuit board layout procedures and can be used as an example for good application layouts. note: board layout is not shown to scale. figure 3: evaluation board figure 4: evaluation board figure 5: evaluation board component side layout. solder side layout. top side silk screen layout / assembly drawing. ldo regulator c byp c out r trace r trace r trace r trace c in r load vin en gnd vout byp v in gnd i in i load i gnd i ripple dc input i load return + noise and ripple i byp only
aat3218 150ma micropower? high performance ldo 16 3218.2006.04.1.8 ordering information output voltage package marking 1 part number (tape and reel) 2 1.2v sot23-5 kwxyy aat3218igv-1.2-t1 1.5v sot23-5 gzxyy aat3218igv-1.5-t1 1.8v sot23-5 hbxyy aat3218igv-1.8-t1 1.9v sot23-5 hdxyy aat3218igv-1.9-t1 2.0v sot23-5 nvxyy aat3218igv-2.0-t1 2.3v sot23-5 aat3218igv-2.3-t1 2.5v sot23-5 hnxyy aat3218igv-2.5-t1 2.6v sot23-5 gwxyy aat3218igv-2.6-t1 2.7v sot23-5 eoxyy aat3218igv-2.7-t1 2.8v sot23-5 emxyy aat3218igv-2.8-t1 2.85v sot23-5 hoxyy aat3218igv-2.85-t1 2.9v sot23-5 gxxyy aat3218igv-2.9-t1 3.0v sot23-5 hpxyy aat3218igv-3.0-t1 3.3v sot23-5 iuxyy aat3218igv-3.3-t1 3.5v sot23-5 aat3218igv-3.5-t1 1.2v sc70jw-8 kwxyy aat3218ijs-1.2-t1 1.25v sc70jw-8 lwxyy aat3218ijs-1.25-t1 1.4v sc70jw-8 juxyy aat3218ijs-1.4-t1 1.5v sc70jw-8 gzxyy aat3218ijs-1.5-t1 1.8v sc70jw-8 hbxyy aat3218ijs-1.8-t1 1.9v sc70jw-8 hdxyy aat3218ijs-1.9-t1 2.0v sc70jw-8 nvxyy aat3218ijs-2.0-t1 2.3v sc70jw-8 aat3218ijs-2.3-t1 2.5v sc70jw-8 hnxyy aat3218ijs-2.5-t1 2.6v sc70jw-8 gwxyy aat3218ijs-2.6-t1 2.7v sc70jw-8 eoxyy aat3218ijs-2.7-t1 2.8v sc70jw-8 emxyy aat3218ijs-2.8-t1 2.85v sc70jw-8 hoxyy aat3218ijs-2.85-t1 2.9v sc70jw-8 gxxyy aat3218ijs-2.9-t1 3.0v sc70jw-8 hpxyy aat3218ijs-3.0-t1 3.3v sc70jw-8 iuxyy aat3218ijs-3.3-t1 3.5v sc70jw-8 aat3218ijs-3.5-t1 1. xyy = assembly and date code. 2. sample stock is generally held on part numbers listed in bold . all analogictech products are offered in pb-free packaging. the term ?pb-free? means semiconductor products that are in compliance with current rohs standards, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. for more information, please visit our website at http://www.analogictech.com/pbfree.
aat3218 150ma micropower? high performance ldo 3218.2006.04.1.8 17 package information sot23-5 all dimensions in millimeters. 4
aat3218 150ma micropower? high performance ldo 18 3218.2006.04.1.8 advanced analogic technologies, inc. 830 e. arques avenue, sunnyvale, ca 94085 phone (408) 737-4600 fax (408) 737-4611 sc70jw-8 all dimensions in millimeters. ? advanced analogic technologies, inc. analogictech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an analogictech pr oduct. no circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. analogictech reserves the right to make changes to their products or specifi cations or to discontinue any product or service without notice. customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information b eing relied on is current and complete. all products are sold sub- ject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. analogictech warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with anal ogictech?s standard warranty. testing and other quality con- trol techniques are utilized to the extent analogictech deems necessary to support this warranty. specific testing of all param eters of each device is not necessarily performed. analogictech and the analogictech logo are trademarks of advanced analogic technologies incorporated. all other brand and produ ct names appearing in this document are regis- tered trademarks or trademarks of their respective holders. 0.225

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